bb5 unlock manual the block resides in this chip: manually the block can be removed, with proper equipments and interface the PBA with a special hardware K8S5615ETA 256M Bit (16M x16) Muxed Burst , Multi Bank NOR Flash Memory General Description Features Package & Packing Production & Availability Specification Data Material Data Declaration Sheet Declaration Letter General Description The K8S5615E featuring single 1.8V power supply is a 256Mbit Muxed Burst Multi Bank Flash Memory organized as 16Mx16. The memory architecture of the device is designed to divide its memory arrays into 519 blocks with independent hardware protection. This block architecture provides highly flexible erase and program capability. The K8S5615E NOR Flash consists of six**** banks. This device is capable of reading data from one bank while programming or erasing in the other bank. Regarding read access time, the K8S5615E provides an 14.5ns burst access time and an 88.5ns initial access time at 54MHz. At 66MHz, the K8S5615E provides an 11ns burst access time and 70ns initial access time. The device performs a program operation in units of Single 16 bits (word) and an erase operation in units of a block. Single or multiple blocks can be erased. The block erase operation is completed within typically 0.7 sec. The device requires 15mA as program/erase current in the extended temperature ranges. The K8S5615E NOR Flash Memory is created by using Samsung's advanced CMOS process technology. This device is available in 44 ball FBGA package. Features Single Voltage, 1.7V to 1.95V for Read and Write operations Organization - 16,777,216 x 16 bit ( Word Mode Only) Multiplexed Data and Address for reduction of interconnections - A/DQ0 ~ A/DQ15 Read While Program/Erase Operation Multiple Bank Architecture - 16 Banks (16Mb Partition) OTP Block : Extra 256Byte block Read Access Time (@ CL=30pF) - Asynchronous Random Access Time : 90ns (54MHz) / 80ns (66MHz) - Synchronous Random Access Time : 88.5ns (54MHz) / 70ns (66MHz) - Burst Access Time : 14.5ns (54MHz) / 11ns (66MHz) Burst Length : - Continuous Linear Burst - Linear Burst : 8-word & 16-word with No-wrap & Wrap Block Architecture - Eight 4Kword blocks and five hundreds eleven 32Kword blocks - Bank 0 contains eight 4 Kword blocks and thirty-one 32Kword blocks - Bank 1 ~ Bank 15 contain four hundred eighty 32Kword blocks Reduce program time using the VPP Support Single & Quad word accelerate program Power Consumption (Typical value, CL=30pF) - Burst Access Current : 30mA - Program/Erase Current : 15mA - Read While Program/Erase Current : 40mA - Standby Mode/Auto Sleep Mode : 25uA Block Protection/Unprotection - Using the software command sequence - Last two boot blocks are protected by WP=VIL - All blocks are protected by VPP=VIL Handshaking Feature - Provides host system with minimum latency by monitoring RDY Erase Suspend/Resume Program Suspend/Resume Unlock Bypass Program/Erase Hardware Reset (RESET) Data Polling and Toggle Bits - Provides a software method of detecting the status of program or erase completion Endurance 100K Program/Erase Cycles Minimum Data Retention : 10 years Extended Temperature : -25°C ~ 85°C Support Common Flash Memory Interface Low Vcc Write Inhibit Package : 44 - ball FBGA Type, 8x11mm, 0.5 mm ball pitch, 1.0mm (Max.) Thickness |
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