Method 2 was used from software version 0.0.2.6 to 0.0.3.0
Method 1 was used on all other software versions.
Some users reported they have success and work more good Method 2 (we read forum and based this on reported software versions).
Some other users reported the all other versions (Method 1) worked well or more good.
So, we included both 2 methods now. Try one, if not unlock can try the other one.
It also depends on phone models, so on some phones could work better Method 1 and on some other phones could work better Method 2.
What exactly is the difference is hard to explain here, mainly is about tunning timing values and at exactly what time (regarding to clock front signal) data is sampled, also if data is sampled on rising or falling edge of the clock.
Something like this graphic (we can change timings inside CPLD also clock edge, risimg or falling):
http://en.wikipedia.org/wiki/Image:F...ld_Toutput.svg
All this timings in real world (when you perform unlock) could differ from one flash chip to another. Also this timings is influenced of capacitance loading values over CLK and DATA lines (= length of TP wires, position of TP wires, GND connection point).