N93_Presentation_mko-all info-- all sechm >>>by nalkershy

[nalkershy]

thes mob we well take all info -

[nalkershy]

N93 Overview


WCDMA and tri-band GSM/EDGE world phone
N93 (RM-55):
WCDMA 2100 & EDGE/GSM 900/1800/1900
N93 (RM-153):
EDGE/GSM 900/1800/1900
3.2Mega pixel camera with 3x optical zoom, up to 20x digital zoom
Video recording with VGA 30fps and play back
****og video signal output with stereo audio via Pop-PortTM
Stereo digital microphone
Wireless LAN support
Mini-SD card support
Full-speed USB support
Bluetooth
Stereo FM radio
IrDa

N93 BB Structure

RAP3GStack/RAPS with PoP2, Vilma and Betty as Cellular engine
OMAP2420PoP with PoP3 and Menelaus as Application engine
Two camera modules
3.2Mega pixel as main camera
CIF as sub camera
Two display modules
Main display: QVGA 2.4 inch(320 x 240 pixel), 256 k colours
Sub display: CSTN (128 x 36 pixel), 64 k colours
BTHFM1.0 as Bluetooth and FM radio
WLAN size3.0 as wireless LAN module
IHF speaker, digital stereo microphone
TV-out interface for video signal output
Full-speed USB support (No on-the-go support)
Mini-SD card support
IrDa interface
Pop-PortTM connector and 2mm charger plug
BP-6M battery

[nalkershy]

N93 Block Diagram






RAP3GS/RAPS


RAP3GS ASIC is a stacked version of RAP3G and completely same functionality is implemented as RAP3G.
RAPS ASIC is a stacked version of RAPGSM and completely same functionality is implemented as RAPGSM.
In general RAP3GS/RAPS consists of:
Processor subsystem (PSS) that includes ARM926 MCU as a main processor, Lead3 PH3 DSP and related functions
Combo memory module
RAP3GS/RAPS core voltage (1.35V) is generated from Betty VCORE and I/O voltage (1.8V) is from Vilma VIO. Core voltage in sleep mode is lowered to 1.05V


PoP2 Memory Module

PoP2 (Combo memory) module consists of 128Mbit DDR SDRAM memory and 128Mbit NOR Flash memory and is stacked on the top of the RAP3GS/RAPS. This means interface signals between RAP3GS/RAPS cannot be seen cause there’s no tracking on PWB.
DDR SDRAM
DDR SDRAM is used mainly as a dynamic data storage for MCU data.
SDRAM core voltage (1.8V) is generated from Vilma VDRAM and I/O voltage (1.8V) is from VIO
NOR flash
NOR flash interface is based on DCT-4 Flash interface
NOR Flash memory is used to store
MCU program code
DSP program code
Tuning values
etc...
Logic and supply voltage for NOR Flash is supplied from VIO (1.8V)
Vilma
Vilma EM ASIC includes following functional blocks:
Start up logic and reset control
Charger detection
Battery voltage monitoring
32.768kHz clock with external crystal
Real time clock with external backup battery
SIM card interface
Stereo audio codecs and amplifiers
A/D converter
Regulators
Vibra interface
Digital interface (CBUS)
Vilma ASIC does not include security functions such as UEM(E)

Betty

Betty EM ASIC includes following functional blocks:
RAP3GS/RAPS Core supply generation
Charge control circuitry
Level shifter and regulator for USB/FBUS
Current gauge for battery current measuring
External LED driver control interface
Digital interface (CBUS)
Betty ASIC does not include security functions such as UEM(E)


OMAP2420

OMAP2420 is high performance multimedia application processor based on the enhanced OMAP™ 2.0 Architecture.
The core runs at 1.05V and 1.3V nominal while the interface is specified at 1.8V nominal.
MCU core is ARM 1136JF-S™
DSP core TI 55X is inside
ARM 7 base IVA module is Image and Video Accelerator
There are internal ROM/RAM and external memory controller
N93 is using General Purpose Memory Controller for MuxOneNAND flash memory, SDRAM Controller for DDR memory
Display SubSystem has video out block which can convert video data to Composite video signal
DMA controller transfers data between block to block without SW operation

Menelaus

Menelaus EM ASIC includes following functional blocks:
OMAP2420 Core supply generation
OMAP2420 I/O supply generation
OMAP2420 PLL block supply generation
DDR/NAND Memory Core and I/O supply generation
Reference voltage generation for TV-OUT block in OMAP2420
TV-OUT buffer (BUFFY) and TMP105 Temperature Sensor supply generation
Level shifter and regulator for miniSD card

[nalkershy]

Power-up Sequence






Clock Distribution


A 38.4MHz VCTCXO is used as system clock.
The 38.4MHz system clock is fed unbuffered to RF ASICs. After buffering in PIHI, the 38.4MHz differential clock is then fed to RAP3GS/RAPS.
The 38.4MHz clock coming from VCTCXO is buffered again for BT.
RAP3GS/RAPS slices 19.2MHz for OMAP2420.
In SLEEP mode the VCTCXO is off. Vilma generates low frequency sleep clock signal (32.768 kHz) that is fed to Betty, RAP3GS/RAPS and OMAP.
Betty uses external 2.4MHz SMPS-clock as long as external SleepX -signal is HIGH-state. Otherwise 2.4MHz internal RC-oscillator is used to generate clocks inside Betty.

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Main Camera

Sensor: 1/3.2-inch 3.2M pixels
Lens: Auto Focus, Optical Zoom up to 3x
Electrical Interfaces
Main Camera is connected to OMAP2420
Data Transfer: CCP (Sub-LVDS, up to 208MHz)
Control: I2C (1.8V, 100kHz)
Power Supply: Three 3.0V discrete regulators (AVDD, DVDD, LVDD) and APE_VIO from Menelaus
Clock: FCLK (19.2MHz) from OMAP2420
Others: RESET and PWDN

[nalkershy]

Sub Camera

Sensor: 1/7-inch CIF CMOS
Lens: Fixed Focus
Electrical Interfaces
Sub Camera is connected to Main Camera (NOT to OMAP2420)
Data Transfer: Parallel 9 bit
Control: I2C with Enable (2.9V, 560kHz)
Power Supply: CIFVDD (2.9V) from Main Camera
Clock: CIFMCK (9MHz) from Main Camera

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Flash & Indicator LED


Flash LEDs and Indicator LED is mounted on the UI PWB.
Flash LED driver circuit and Indicator control circuit are located on Engine PWB.
Engine PWB and UI PWB are connected by 50-pin board-to-board connector .
- 2 signals for Flash LED current
- 2 signals for Indicator LED current

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Display Module

Main display
Active matrix TFT/Wide-viewing
LCD (240x320(QVGA), 256k colors)
MeSSI-16 with 8 bit bus
4 white LED backlight
Transflective
Normally black color at power off

-------------------
Sub display
CSTN (Color STN) LCD (128x36, 64k colors)
LoSSI
1 white LED backlight
Transmissive
Normally black color at power off

[nalkershy]

Display and Keyboard Backlight

N93 has one Led Driver (SMPS) that is used to drive both Main/Sub display and keyboard LED’s
Main Display LED’s (4pcs), Sub Display LED (1pc) and keyboard LEDs (4pcs x3) are connected in series
In typical use case keyboard LEDs are turned ON only in dark ambient lighting conditions
Maximum voltage level for keyboard & display LEDs is 18V (over the whole LED chain), typical value is 15V. LED currents for display and keyboard variates a lot due to SW control.

[nalkershy]

Sensors

Ambient light sensor(ALS)
Information of ambient lighting is used to control backlights of the phone
Keypad lighting is only switched on, when environment is dark / dim
Display backlights are dimmed, when environment is dark / dim
Data is sampled by AD converter located in Vilma.
Rotation sensor

Rotation sensor locates on Flip flexi PWB and a mechanical switch is used for it.
Data is corrected by OMAP2420.

Flip open/close sensor
Flip open/close sensor is located on UI flexi PWB and MR (Magneto Resistive) sensor is used for.
MR sensor is bit more sensitive to the magnetic field compared to hall sensor.
Magnetic field detection is different from hall sensor.
Regular magnets designed for hall sensor usage might not work correctly with MR sensor.
MR sensor is omnipolar. Polarity can be either way, but field direction has to be corrected by OMAP.

[nalkershy]

Audio Block Diagram

RAP3GS/RAPS & Vilma form the audio codec

Vilma provides interface for the transducers and the accessory connector
N93 used transducers:
Earpiece
IHF
Microphone : 2 x digital


Audio modes are:
Hand portable mode
Headset mode
Hands free mode

[nalkershy]

Audio Modes (Hand portable mode)

RAP3GS/RAPS’s AuxMicDat used for internal digital microphones.
Left side (key side) microphone is used as telephony mode, and both digital microphones are used as stereo recording microphones for camcorder mode.



The PDM output is transferred from RAP3GS/RAPS to VILMA in EarDaL line
EARP and EARN outputs are led differentially to earpiece

[nalkershy]

Audio Modes (Headset mode)

Vilma differential microphone inputs MIC2P and MIC2N used for accessory audio microphone
Vilma transmits PDM signal via MicData to RAP 3GS/RAPS for further processing

ACI line used for accessory detection

The mono/stereo PDM output is transferred from RAP3GS/RAPS to Vilma in EarDaL and (in stereo case) EarDaR line(s)
XEARR and XEARL outputs are led differentially to headset

[nalkershy]

Audio Modes (Hands free mode)


RAP3GS/RAPS’s AuxMicDat used for internal digital microphones.
Left side (key side) microphone is used in handsfree telephony mode.


The PWM output for the internal handsfree speaker is led from RAP3GS/RAPS to Vilma via PMARP and PMARN lines.
Digital amplifier output is led differentially via HFSpP and HFSpN lines to IHF speaker

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TV-out

Composite video only. No S-Video etc, higher quality.
TV-out function is multiplexed on XEARN in Pop-PortTM .
The ****og switch is used to switch each function.
Buffy is a video amplifier IC.
TV-out cable CA-64U is used to connect between phone and TV.